1. Technical Field
The present disclosure herein relates to semiconductor devices and, more particularly, to three dimensional semiconductor memory devices.
2. Discussion of Related Art
In two dimensional semiconductor memory devices, memory capacity may be limited by the number of memory cells that can be placed on the planar surface of the substrate. The integration density of the two dimensional semiconductor memory devices may be influenced by a minimum feature size which relates to a process technology for forming fine patterns. However, there may be limitations in the process technology for forming smaller patterns.
A need therefore exists for three dimensional semiconductor memory devices that include a plurality of memory cells which are three dimensionally arrayed.